Since the invention of the integrated circuit (IC), the semiconductor industry has experienced rapid growth due to continuous improvements in the integration density of various electronic components (i.e., transistors, diodes, resistors, capacitors, etc.). For the most part, this improvement in integration density has come from repeated reductions in minimum feature size, which allows more components to be integrated into a given area. These smaller electronic components also require smaller packages that utilize less area than previous packages. Some smaller types of packages for semiconductor devices include quad flat pack (QFP), pin grid array (PGA), ball grid array (BGA), flip chips (FC), three dimensional integrated circuits (3DICs), wafer level packages (WLPs), and package on package (PoP) devices.
A 3DIC may be formed by stacking two IC dies above each other to achieve a smaller size package. One type of 3DIC is the package-on-package (PoP) structure, wherein multiple dies coupled to respective substrates can be stacked above each other. A first die is electrically coupled to a first substrate to form a first circuit. The first circuit includes first connection points for connecting to a second circuit. The second circuit includes a second die and a second substrate having connection points on each side of the substrate. The first circuit is stacked and electrically coupled above the second circuit to form the PoP structure. The PoP structure can then be electrically coupled to a PCB or the like using electrical connections.
Another type of 3DIC is formed using a silicon interposer substrate (either passive or active) to provide much finer die-to-die interconnections, thereby increasing performance and reducing power consumption. In these situations, power and signal lines may be passed through the interposer by way of through vias (TVs) in the interposer. For example, one die is bonded above another with the lower die being coupled to the interposer using contact pads located on the interposer. The contact pads can then be electrically coupled to a printed circuit board (PCB) or the like using electrical connections.
In a 3DIC package, an underfill material may be used between a die and a substrate, an interposer, or a PCB, to strengthen the attachment of the die to the substrate, the interposer, or the PCB, and to help to prevent the thermal stresses from breaking the connections between the die and the substrate, the interposer, or the PCB. However, the underfill material may not protect connections well for connectors located at the corners of a package due to the capillarity for four corner underfill dispensing, which may leave some connectors unprotected by the underfill material. Methods and apparatus are needed to help to protect the connectors at four corners of a package with underfill materials while forming semiconductor packages.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.